The inter-die gap height for 12 Hi was 13 microns, and Hynix reduced it to 6.5 microns for their hypothetical 16 Hi If you know a bit about fluid dynamics, you're probably aware that the flow rate between two closely spaced surfaces is proportional to the cube of the gap height
Zephyr — the physics of SK Hynix's HBM4 problem: halving the die gap cuts underfill flow 8x
Zephyr — the physics of SK Hynix's HBM4 problem: halving the die gap cuts underfill flow 8x
A physical explanation for reports that SK Hynix's HBM4 back-end work has stalled (posted Oct 14). Flow between two close surfaces scales with the cube of the gap, so cutting the die gap from 13 to 6.5 microns for a 16-high stack cuts underfill flow about eightfold. He builds on his own earlier post, which cites a March ZDNet report on Hynix's underfill difficulty and says Samsung will have the highest HBM share next year. It is the author's inference, not a company statement: read it as a share-shift risk inside the memory cycle, not a settled fact.
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A physical explanation for reports that SK Hynix's HBM4 back-end work has stalled (posted Oct 14). Flow between two close surfaces scales with the cube of the gap, so cutting the die gap from 13 to 6.5 microns for a 16-high stack cuts underfill flow about eightfold. He builds on his own earlier post, which cites a March ZDNet report on Hynix's underfill difficulty and says Samsung will have the highest HBM share next year. It is the author's inference, not a company statement: read it as a share-shift risk inside the memory cycle, not a settled fact.
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